Meta Stack Exchange is a question and answer site for meta-discussion of the Stack Exchange family of Q&A websites. It only takes a minute to sign up.
Sign up to join this community
I see many questions on Stackoverflow with strange tag pickups. They have [makefile] tag but they don't have such tags as [make], [qmake], [gnumake] etc. It happens that there are about 200 of such questions.
When I came across these questions, I retagged them, adding proper [make] and/or [qmake] tag. But such questions keep appearing, so I'm in doubt whether tagging with [makefile] only is indeed incorrect.
How should questions, that regard writing makefiles, be tagged?
I seem to recall, back in the late neolithic when I was new to unix, that I didn't think of make as a language or a nameable entity, rather it was a verb, and the thing was the file.
Which is probably what the tag-with-[makefile] thing is about.
I think that such questions should be tagged with the tool [make|cmake|qmake...] rather than with [makefile], and have been making this change when I am editing such questions anyway.
makefile-mode, so I guess I can sorta see why this might happens...
In short
Tagging question that concerns "make" with [makefile] is the same thing as marking [c] question with [c-file] tag. A makefile is just a file that contains program for one of the make tools.
How should the questions be tagged?
Mark your questions with the at least one of the following tags:
Whether [makefile] tag persists is irrelevant, but I'd advice to drop it, because novices see lots of [makefile] tags and think that it's the way they should mark questions. While it leads to confusion only.
What's the difference between "make" and "makefile"?
Mostly used for build systems, there exists a program called "make". The purpose of this program is to maintain dependency information between files (e.g. source and object files of your project) and to update (e.g. recompile) only those files that actually need it.
You can check how it works by creating a file hello.c with a simple program and typing
$ make hello
You'll see how make invokes C compiler and builds executable for your program. If you invoke the same command again, it will report that hello is up to day, and it will be recompiled only if you update hello.c file.
Note that you do not need a makefile for that! Because for simple rules make can do well without any makefile! But of course, if the rules go more complex, you'll need one.
A "makefile" is a file that contains a program written in special language for it to be executed by the "make" interpreter. It contains project-specific rules and dependency relations. The "make" program matches them against the file system and determines the sequence of commands that need to be executed to bring the target supplied up to date.
There are different make systems and standard, each of which has a different language: GNU make, POSIX make specifications, Microsoft's nmake; and meta-make high-level systems that generate makefiles just like C compiler generates assembly: qmake for Qt and general-purpose CMake.
As the programs share the same domain, the programs that drive their befavior are called "makefiles". But the languages, in which these makefiles are written, are different! So you should always specify the actual "make" program you use in your questions and tags. Not only this is correct, but also it avoids confusion, when people answer the question that later occurs to be restricted to the other make program.
G'day,
For me the distinction is clear.
HTH
BTW Thanks for asking Pavel, and don't feel worried about retagging people if you think it is justified! (-: We can easily roll it back if we truly believe in the original tag! :-P
